SMTS Silicon Design Engineer Job Listing at AMD in Hyderabad, Telangana (Job ID 52786-en-us)

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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SMTS -VC_LP

Job description, Role responsibilities:

As a member of the VSI-LP (vc_lp) team, you will be responsible for the various types of vc_lp checks at different stages (such as upf, functional stage, structural ). You will work directly with the implementation teams (PD, Front End, DFT) during the entire chip design cycle to drive vc_lp signoff closure for tape out. You will lead schedules and support cross-functional engineering efforts. You need to work with different teams and will also be responsible for sign off of Power aware formality checks.

Required skills & experience

1. 9+ years of physical design experience with emphasis on PNR (APR), MV design implementation and vc_lp (vsi-lp) sign off checks.
2. Realtime SOC tape out experience in sub-14nm technology nodes with a track record of successful tapeouts/signoff.
3. Strong knowledge and debugging skills in vc_lp (vsi-lp, power aware formality, LP flows and Signoff experiece) issues is mandatory.
4. Strong knowledge on UPF is mandatory. Need to be able resolve all UPF and implementation issues from synthesis to gds.
5. Strong knowledge on Low power techniques is mandatory. Experience in planning vc_lp (vsi-lp) closer on multiple projects will be plus.
6. Strong Knowledge of all aspects of ASIC physical design from Synthesis to gds will be a plus.
7. Scripting skills to debug flow related issues and make enhancements as appropriate
8. Expertise in industry standard tools used such as Synopsys ICC2, fusion compiler, vc_lp and formality tools will be a plus.
9. Experience in low power designs and their physical implementation strategies.
10. Experience in leading and mentoring a team in upf,vc_lp closer.

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.