MTS Engineer - RTL Design, STA and Methodologies Job Listing at AMD in Hyderabad, TS (Job ID 54608-en-us)

Description

THE ROLE: 

The engineer taking on this key role in AMD's Silicon design group will create methodologies and flows to ensure the quality and power efficiency of entire design implementation spec, including RTL, UPF and constraints deployed at all levels within large, complex SOCs. Included will be flows that also ensure implementation netlists match functional and power intents.

You will work with designers, corporate CAD engineers, and external tool vendors to deploy the industry's latest tool capabilities in service of creating the highest quality products in the market, sometimes targeting a single tapeout to production. These products are used in electronics which touch many aspects of people's lives, from laptops to automobiles to the cloud data center.

THE PERSON:  

You have a passion for modern, complex hardware and IP architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. 

KEY RESPONSIBILITIES:   

• Specify time efficient and high impact tools, flows and methodologies to qualify RTL, UPF and other design specification collaterals
• Build code to automate and remove as much as possible the need for manual checks or waivers
• Provide good quality training and documentation to design engineers
• Debug tool failures to determine the root cause; work with designers, CAD engineers and tool vendors to resolve tool issues
• Keep up with industry trends to incorporate new capabilities such as AI into design flow
• Incorporate regressions and other checks into tool release process to ensure quality of tools and methodologies

PREFERRED EXPERIENCE:  

• Experience with Verilog, System Verilog, or VHDL RTL design and UPFs
• Experience in Silicon IP development process and front-end methodologies
• Experience in using front end design tools: such as linters, CDC checkers or low power checkers
• Experience with TCL scripting
• Python/perl/makefile scripting skills
• Experience in successfully debugging issues with tools
• Contributed to 2 or more tapeouts of complex SoCs
• Experience creating and delivering impactful presentations and high-quality documentation

ACADEMIC CREDENTIALS:  

• A Bachelor of Science Degree in Electrical Engineering or Computer Science is required.

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